Defined and implemented first 2 high reliability PSPI (at major semiconductor company) 

Member of original PBGA (WB and FC) team responsible for surface analysis/material and interface optimization 

Member of teams that developed/implemented the 3 major bumping processes: provided key contributions in material selection, process development, metrology and reliability

• Evaporated Bump (PSB and UBM material/process  

  selection and optimization) 

• Plated Bump (low cost bump team responsible for   

  metrology and cleans processes: electroless Ni-Au process

  which was subsequently licensed) 

• Paste Printed Bump (responsible for materials (resists,   

  removal methods and material interactions) and defined   

  critical areas and material roadmaps)  

Member of WSS teams responsible for materials for TSV, BSM, wafer thinning and thin wafer bump processing applications

• Developed unique material/process options for these   

  application areas  

Developer of advanced packaging concepts

• Project leader for fan in packaging project (FIP-FAB 

  integrated package) 

• Demonstrated thermoplastic and flex package IC 

  packaging concepts 

• Co-inventor of RCP fan out package (on initial 3 patents)

• Defined and implemented PSB for power Au/Cu and WLBI 

• Developed AM (additive manufacturing proposal for IC 

  packaging including patent application for a variety of 

  processes/applications) 

• Defined and showed proof of concept of a variety of  

  universal media concepts 

• Defined and determined drivers for materials for IC   

  inductors​